1. Field of the Invention
The present invention relates to a method for verifying mask pattern data, a method for manufacturing a mask, a mask pattern data verification program, and a method for manufacturing a semiconductor device.
2. Description of the Related Art
In recent years, semiconductor device manufacturing techniques have been markedly improved; semiconductor devices of minimum machining size 70 nm are now mass produced. Such a shrink has been achieved by rapid progresses in fine pattern formation techniques such as mask process techniques, optical lithography techniques, and etching techniques. When circuit patterns on semiconductor substrates were large enough, a circuit pattern was able to be formed on a substrate almost as designed by drawing the planar shape of a circuit pattern desired to be formed on a semiconductor substrate faithfully as a design circuit pattern, producing a mask pattern that corresponds exactly to the design circuit pattern, using a projective optical system to transfer the mask pattern to the substrate, and etching an underlayer. However, the reduced sizes of circuit patterns have made it difficult to faithfully form a circuit pattern in each process. As a result, the finished size of the circuit pattern may disadvantageously be different from the size of the design circuit pattern.
In particular, in a lithography and etching processes, a circuit pattern arranged around a marked circuit pattern to be formed significantly affects the dimensional accuracy of the marked circuit pattern. The lithography and etching processes are most important in achieving micromachining. It is thus important to increase the accuracy of circuit pattern dimensions in these processes.
Thus, to avoid these adverse effects, techniques called optical proximity correction (OPC) and process proximity correction (PPC) have been developed. These techniques pre-add an auxiliary pattern to a mask pattern or increase or reduce the width of the mask pattern so that the machined circuit pattern has the same dimensions as those of the design circuit pattern (desired values).
The techniques for optical proximity correction and process proximity correction have been reported in Jpn. Pat. Appln. KOKAI Publication Nos. 09-319067 and 2003-107664, SPIE Vol. 2322 (1994) 374 Large Area Optical Proximity using Pattern Based Correction, D. M. Newmark et. al. These techniques enable a circuit pattern on a semiconductor substrate as designed.
A mask pattern produced via the optical proximity correction or process proximity correction is verified to see if it enables to form a circuit pattern as designed. Recently, more stringent requirements for micromachining have made it more difficult to finish a circuit pattern as designed. This makes the conventional verification methods improper.